Even Single-core processor software assets that are not recognized by a multi-core processor can be easily re-used through eT-Kernel Multi-Core Edition’s scheduling method.
Open specification API
In addition to its base support for standard T-Kernel and T-Kernel/Standard Extension APIs, eT-Kernel/MultiCore Edition can also support POSIX APIs, allowing more extensive reuse of existing worldwide software assets.
Details on POSIX support
Strong support for POSIX
Nearly all POSIX APIs are supported. Not only is it supported as a simple wrapper, but by tuning eT-Kernel core internals, genuine POSIX support is available without any performance loss. Thanks to this capability, Existing and new software assets using the portable POSIX APIs can be re-used, and engineering resources can be more efficient.
"Base Definitions volume (XBD)" and "System Interfaces volume (XSH)" are supported based on The Open Group Base Specifications Issue 6 IEEE Std 1003.1, 2004 Edition.
"Memory Partitioning" system protection for multi-core system reliability and quality
The eT-Kernel Multi-Core Edition Memory Partitioning option helps to ensure reliability and quality in multi-core systems. This is especially effective for large-scale, high-performance systems using a Memory Management Unit (MMU), which requires strong reliability and quality.
Three profiles are utilized for scalable product development
For systems using a multi-core processor, three eT-Kernek profiles -- eT-Kernel/POSIX, eT-Kernel/Extended, and eT-Kernel/Compact -- are available for selection to match system scale and use. Since core kernels are the same for all three, device driver and middleware can be re-used as kernel applications for all profiles. When the user has a product line and wants to change OS services to much a product series, simply changing the profile makes effective development possible while re-using software.
eBinder provides a multi-core processor compatible development environment
By using eBinder, functions and tools can be used efficiently to easily solve the complex issues that are unique to multi-core processor use, while keeping the - Same development model as when using a single processor.
This feature contributes to efficient software development for multi-core processors. In addition to debugging individual programs running with each CPU core, this feature also makes it possible to transparently perform tasks such as cooperative operation between programs and full system analysis.
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Scheduling method - Blended Scheduling®
An eT-Kernel Multi-Core Edition based system enables users to mix one or multiple AMP-type or SMP-type programs (depending on the quantity within the multi-core processor) with a single multi-core processor and a single eT-Kernel Multi-Core Edition. Because of this, the merits of AMP-type and SMP-type programs can be fully utilized to attain a diverse, flexible system structure.
This is made possible by the eT-Kernel Multi-Core Edition’s unique scheduling method. Mode operation for the program is determined during system configuration. A total of four scheduling modes are available as a scheduling method, based on the following two basic modes. A priority-based scheduling method is used for all modes.
Single-Processor Mode (SPM)
Developers can assign a single CPU core to operate the program. Because of this, the program can run on a determined core just as with an AMP-type system.
Merits of SPM
• Software assets meant for a single-core processor that are not recognized by multi-core processors can be easily re-used.
• Effective for re-using device drivers. By selecting SPM for embedded processing routine and driver task, and assigning a specific core, single-core drivers can run like before.
• As with single-processor and normal AMP-type systems, non-SPM-type programs that operate with an exclusive CPU core will not run, ensuring the usual real-time capability.
True SMP Mode (TSM)
With this mode, the OS can be used to select a CPU core to operate a program. Program tasks are dynamically allocated to each available core and carried out according to priority level.
Merits of TSM
• Dynamic load sharing via OS.
• The entire program’s average throughput can be raised to its maximum limit.
And two additional scheduling modes are available based on this basic scheduling mode.
Single Processor Mode on TSM cores (SPM on TSM)
This mode allows developers to assign a single CPU core to run a program, from multiple TSM cores that run TSM programs. Because of this, the program will only run with the determined core, but other TSM programs and SRL-on-TSM programs can also run on that core.
Merits of SPM on TSM
• Even if the multi-core processor only has two CPU cores, SMP-type/AMP-type programs can still be mixed.
• Effective for re-using device drivers
When selecting an interrupt process routine, driver task, and SPM on TSM, then assigning a specific core, the driver task spin lock process is no longer necessary.
•This reduces CPU idle time which tends to occur frequently with SPM, so that CPU core resources can be utilized effectively
Serialized threads on TSM cores (SRL on TSM)
This mode serializes and runs an assigned task set (normally all tasks belonging to a process). Serialization means that these tasks will not run simultaneously in multiple cores. SPM and SPM on TSM are the same in this respect, but the difference is that cores for running tasks are not fixed, instead spanning over multiple TSM cores. Serialization targets a task set belonging to a certain process, and is not performed for tasks belonging to a different process. Because of this, running multiple processes in this mode will carry out the same serialization as that of a single processor for task groups within the processes. Also, load balancing will be performed in process units for other processes, providing the SMP merit of automatic load sharing.
Merits of SRL on TSM
•SMP scheduling can also be carried out for software assets designed for single-core processors, which are not recognized by multi-core processors.
Conceptual Image of SPM on TSM and SRL on TSM
Comparison of 4 scheduling modes
||Interference from other cores
|Single Processor Mode (SPM)
||Fixed upon thread creation
||None or minimal
|True SMP Mode (TSM)
||Auto balancing by OS
|Single Processor Mode on True SMP (SPM on TSM)
||Fixed upon thread creation
|Serial on True SMP (SRL on TSM)
||Fixed upon thread creation
By assigning Single Processor Mode (SPM), Single Processor Mode on TSM (SPM on TSM), or Serial on TSM (SRL on TSM), software assets existing on a single processor can quickly and easily be reused with a multi-core processor. This also applies to transition of existing AMP-type programs.